can provide full chain closed-loop design support from impedance simulation to stack optimization, covering the performance guarantee requirements of high frequency signal transmission throughout the entire cycle.
Full scene impedance calculation: covering mainstream impedance targets such as single end 50 Ω and differential 100 Ω, adapting to different transmission line structures such as microstrip line and stripline, locking the impedance deviation in advance within ± 5%, and achieving ± 2% ultra-high accuracy in high-end scenes.
Multi dimensional simulation verification: relying on professional tools such as HFSS and Polar SI9000, complete insertion loss, return loss simulation and impedance continuity analysis, locate weak signal links such as via holes and layer changes, and avoid signal reflection problems caused by impedance mismatch after production.
Measurement and calibration: Establish a simulation database for benchmarking with mass production processes, combined with the TDR time-domain reflectometer retesting mechanism, to ensure that the simulation results are controlled within a very small range of impedance deviation from the actual finished product.
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Full dimensional stacking construction: Complete layer layout according to the number of layers and signal rate requirements, accurately select core boards, semi cured sheets, and copper thickness configurations, strictly follow the principle of center symmetry, and avoid compression warping problems.
Cost optimization of mixed compression scheme: Adopting the "critical path dedicated" strategy, only high-end high-frequency plates such as PTFE and Rogers are used in the core high-frequency unit, and FR-4 is used in other areas to compress the comprehensive cost by over 70% while ensuring performance.
Process compatibility verification: Strictly control the CTE difference of heterogeneous materials within 20 ppm/℃, verify that the interlayer peel strength of the special bonding sheet for PTFE and FR-4 mixed compression is >= 0.8 N/mm, and eliminate the risk of delamination under temperature cycling.
DFM manufacturability review: Review line width, line spacing, hole ring, solder mask, and splicing one by one to expose production risks in advance and avoid problems where the design meets performance requirements but cannot be processed.
Special material selection and adaptation: For different scenarios such as 6G millimeter wave, 77GHz vehicle radar, AI computing cluster, etc., accurately match Rogers, Taikangli and other series of substrates, balance Dk/Df performance and processing feasibility.
Full process engineering support for trial production: from EQ confirmation, first article verification to abnormal closed-loop, the technical team follows up on-site during the trial production stage, provides problem handling suggestions on the same day, and ensures the rapid landing and mass production of high-frequency boards.